Implementation of Digital Signal Processor for Pulse Doppler Radar

: This paper presents the design and implementation of a digital signal processor (DSP) board, utilizing a TMS320C50 family DSP chip, for pulse-Doppler radar systems. Pulse-Doppler radar systems often encounter challenges such as strong clutter, noise, and jamming in dealing with echoes. To overcome these challenges, advanced digital signal processing techniques are employed. The main objective of this paper is to introduce a cost-effective signal processing solution that significantly enhances the performance of the radar system and brings it up to speed with modern radar technologies. The hardware described in this work can also be effectively utilized for implementing various types of signal processing algorithms. Additionally, as a secondary objective, the paper presents the digital realization of a radar detector. Traditionally, this detector was constructed using an analog Doppler filter bank. However, in this work, it is digitally implemented using N digital filters in place of the analog bank. By utilizing the designed DSP board and implementing the radar detector digitally, this paper demonstrates the potential for improved performance and efficiency in pulse-Doppler radar systems. The advancements made in this work contribute to the development of cost-effective and technologically advanced radar systems. The research results are presented for four different wind conditions, showcasing the effectiveness of the proposed approach. Furthermore, the paper suggests an algorithm that combines parametric and non-parametric techniques and provides a detailed explanation of its implementation. Finally, using the non-parametric technique, the probability of detection curves (PD) are simulated with respect to the signal-to-clutter ratio (SCR) for each wind condition, and the simulation results are depicted and compared. The achievements of this paper include the proposal of an efficient approach for clutter suppression in ground surveillance pulse Doppler radar, the comparison of different clutter suppression algorithms, and the development of an algorithm that combines parametric and non-parametric techniques. The simulation results provide valuable insights into the performance of the proposed algorithms under different wind conditions.


Introduction
The implementation of digital signal processing (DSP) theory has been dramatically developed over the years.Various types of instruments that manipulate some forms of DSP have been widely used and developed over recent years [1][2][3].Programmable DSP processors are popular due to their numerous advantages in comparison to other types of microprocessors, such as potentially being programmable in the field and capable of being restored or upgraded.Furthermore, they provide high-speed performance at an inexpensive cost and also require low power sources.Hence, digital techniques are widely used due to their adaptive properties mentioned above [4][5][6].Therefore, DSP processors could be utilized in radar systems in many applications, such as automatic detection, signal extraction, image reconstruction, etc. [7][8][9][10].Pulse-Doppler radar is often observed in surveillance applications and separates moving target echoes from those unwanted echoes reflected from objects other than the target (i.e., clutter) [11,12].
In order to attain this purpose, Doppler frequency shift in back-scattered echoes should be measured using efficient signal processing methods.In [13], a fully programmable pulsed Doppler radar signal processor is designed that is adaptable and multi-function capable.The processor is implemented using high-speed VLSI digital signal processing chips.Hence, in order to implement an adaptive and multi-function processor, it has been realized by taking advantage of the inherent capability of DSP and the parallel signal processing structure with two independent signal flow schemes.The design presented in [13] is accomplished through six steps: (1) Adaptive complex pulse compressing (2); adaptive complex MTI filtering [14]; (3) clutter mapping processing; (4) pulsed Doppler FFT processing; (5) adaptive constant false alarm rate (CFAR) processing; (6) target clustering processing.In [14], the main characteristics of production C50 of the TMS320 series are investigated due to their high-speed processing rate.The DSP board described in this work offers a high internal processing rate and extensive external connectivity options.These include two high-speed serial full-duplex interfaces, I/O parallel interfaces, a programmable internal timer, two general-use external interfaces, and four external interrupts.The integration of memories and external devices decreases costs and provides a small size for the systems [14].In [15], a fixed-point compiler is utilized and developed for programming the TMS320C50 processor.It is an extremely important subject in DSP to reduce development time by manipulating high-level languages.In order to specify the most efficient one, the C compiler is examined for both fixed-point and floating-point digital signal processors.Experimental results show that the processing speed of a fixed-point C program is significantly faster than that of a floating-point C program in a fixed-point digital signal processor.The radar discussed in the paper is capable of indicating moving target, whilse echoes involve a Doppler shift.In addition, a survey is carried out to suppress the clutter effect.The main idea behind the design of a programmable signal processor is to modify or improve radar performance control parameters without hardware adjustment.
In [16] focuses on addressing these issues and proposes the use of filter-OFDM (F-OFDM) and universal-F-OFDM (UF-OFDM) modulation schemes.Also, in this research, F-OFDM is presented as a potential solution.A comparison is made between OFDM and other techniques, with a focus on the key features of F-OFDM.The process of analyzing F-OFDM filters and their interpretation is discussed.Additionally, a new method called UF-OFDM is proposed, which offers reduced computational complexity compared to existing methods while maintaining spectral confinement and preserving signal quality.The research aims to achieve an acceptable framework for a communication system that provides high data rates, high capacity, and low error rates.The simulation results show that the proposed UF-OFDM and F-OFDM outperform existing approaches such as OFDM and UFMC.The paper [17] proposes a model that aims to mitigate the impact of nonlinearities in longdistance, high-capacity communication systems.The model is explored using analytical and simulation-based approaches, and its performance is compared with and without compensation for nonlinearities.The proposed model is evaluated using different configurations, including 4, 8, 16, and 32 channels, with varying channel spacings of 12.5, 25, and 50 GHz.The objective is to analyze the performance of the proposed model in the presence of nonlinearities.The results indicate that the system exhibits poor performance without compensation for nonlinearities.The paper [18] tackles the issue of predicting line-of-sight (LoS) paths in air-to-ground (A2G) communications within urban environments, where the presence of random ground obstacles makes it challenging to determine the existence of a clear LoS path.A comprehensive stochastic LoS probability model is developed for 3-D A2G channels, leveraging statistical geographic information and the concept of Fresnel clearance zone.The proposed model incorporates various factors, such as building height distribution, building width, building spacing, carrier frequency, and transceiver heights.In conclusion, the developed stochastic LoS probability model for 3-D A2G channels in urban scenarios offers a practical solution for predicting LoS paths.By considering multiple factors and employing machine learning techniques, the model provides accurate estimations of LoS probabilities at different frequencies and altitudes, thereby contributing to improved channel modeling and performance analysis in A2G communications.The paper [19] introduces a novel 3D nonstationary geometrically-based stochastic model (GBSM) for MIMO channels.This model accounts for the time-varying, small-scale fading characteristics arising from the movements of the mobile station (MS) and scatterers.The paper also discusses the analysis of update algorithms for time-varying channel parameters, including the number of paths, delays, powers, angles of departure (AoD), and angles of arrival (AoA).Additionally, a universal correlation function for non-stationary channel models is derived, along with the application cases of autocorrelation function (ACF) and cross-correlation function (CCF).The proposed model improves upon existing models by enhancing the calculation of the accumulated phase caused by the Doppler effect.The theoretical results obtained from the model demonstrate improvements over existing models.
Consequently, the non-stationary GBSM model and the hardware emulator presented in the paper can be utilized for evaluating future wireless MIMO systems.By incorporating compensation techniques such as optical filtering and DSP, the model demonstrates improved performance in terms of reduced error rate and power penalty, making it suitable for practical applications in long-haul optical communication.
According to [20], there are several research areas that can be explored to further improve and advance DSP-based pulse Doppler radar systems.One such area is the development of more robust signal processing techniques to enhance target detection and tracking capabilities.Additionally, there is a need for the investigation of advanced modulation schemes, such as frequency modulation and pulse compression, to improve radar system performance.Furthermore, the implementation of adaptive beamforming algorithms can help mitigate interference and improve detection accuracy.Finally, research should be conducted to optimize the use of advanced digital signal processors and high-speed data acquisition systems to handle the increasing computational demands of pulse Doppler radar systems.The implementation of a DSP for pulse Doppler radar systems has demonstrated significant improvements in signal processing capabilities.By utilizing a DSP, the radar system can efficiently perform complex calculations, such as Fourier transforms and filtering operations, in real-time [21].This enables the system to accurately detect and track moving targets while also reducing false alarm rates [22].Additionally, the use of a DSP allows for the implementation of sophisticated signal processing algorithms, such as the pulse compression technique, which greatly enhances the radar's range resolution and target detection performance [23].Overall, the implementation of a DSP in pulse Doppler radar systems has revolutionized the field, leading to improved target detection and tracking capabilities.
The rest of the paper is organized as follows: In Section 2, a DSP scheme is explained for this radar, which can indicate targets such as vehicles or aircraft.Section 3 is concerned with the design and implementation of processor hardware and the realization of the algorithm by using a TMS320C50 DSP and an A/D converter.Section 4 concentrates on software design, which accomplishes DSP operations.This software also manipulates the RGDF signal processor to implement hardware designed in the paper.The chip we used here offers many advantages, such as inexpensive costs, versatility, offering appropriate performance, and fast algorithm's performance improvement.

Radar Signal Processing
Radar signal processing can be defined as the extraction of target echoes from the received signal, represented in digital format, and corrupted with unwanted echoes (e.g., clutter).In general, surveillance radar systems estimate the existence or absence of targets, while radar echoes are distorted by ground clutter, interference, or noise [24][25][26].As mentioned before, pulsed Doppler ground surveillance radar (ground-based pulse Doppler surveillance radar) discussed in this paper detects and indicates moving targets such as heavy or light vehicles, aircraft, etc.In the field of view and listening, if the source of the oscillator and the object to which these fluctuations are touched, either one or the other is moving, we will have the difference between the frequency of the received waves and the frequency of the received waves, which is called the Doppler effect.A Doppler radar that is based on pulse modulation is called the pulse Doppler radar [27].The advantage of combining Doppler processing with pulsed radars is that it provides accurate speed information.This speed is called the change range, which describes the rate at which the target moves or fades away from the radar.The Doppler pulse radar uses the Doppler property to remove clutter and display moving targets.In addition, the processing flow of the pulse Doppler radar signal processor is shown in Figures 1 and 2. Different techniques are presented in the following, which provide processor realization and clutter suppression.
A comparison between the techniques mentioned above tells us that range-gated the fact that range gated Doppler filters show the best performance.Although this is the best approach among the four above, its implementation is costly, and the hardware is massive.The block diagram scheme of the detector is illustrated in Figure 1, which contains numerous space gates after clutter elimination filters.In pulsed Doppler radar, the inter-pulse period could be divided into cells, called range gates, as a particular form of time gating, which could be an efficient method for receiver noise elimination [28].Furthermore, it also provides range measurement by pulse delay ranging, which could be defined as calculating the duration time between pulse transmission and target echo reception.Each cell's duration is proportional to the inverse of the pulse bandwidth of the transmitted signal.The first step of the algorithm proposed in the paper is designed using range gates and is depicted in Figure 1.First, the five steps of the block diagram delineated in Figure 1 could be represented as a Doppler filter, which operates during five steps (i.e., sample and hold, Doppler filters, amplifier, rectifier, and integrator).These steps could be illustrated in the block diagram in Figure 2.This algorithm operates in two modes (i.e., fast and slow modes).The slow mode could be created by using a low-pass filter, and the fast mode could be achieved by using a high-pass filter.

Implementation Analysis
As mentioned before, the radar signal processing algorithm presented in the article operates by using rangegated Doppler filters, which are constructed of too many analog filters.However, in this paper, a DSP chip (i.e., TMS320C50) is utilized instead, and analog filters are replaced by digital filters to create a digital processor board.Processor software should be manipulated here due to signal processing, which involves N filtering operations on echo samples in each range cell, N rectifications, and N integration in the real-time domain.A radar base-band signal contains echoes with Doppler data (modulationor information) from various targets.It should also be noted here that these data are mixed together in the time domain.In order to detect moving targets, the signal should be transmitted to the digital processor unit after applying the necessary processes.
The main tasks of the digital processor unit are as follows: 1) Storage of various target echoes by sampling: The digital processor unit samples the received echoes, capturing them for further processing.Each echo sample represents the response from a specific range cell.2) Application of processing techniques to the samples in each range cell using digital Doppler filters to eliminate echoes from static objects (clutter): The digital Doppler filters are designed to extract the Doppler information from the echoes.By applying these filters, the processor can distinguish moving targets from stationary clutter.3) Generation of a DC level proportional to the target echo power: Each digital Doppler filter produces an output that represents the strength of the target echo within a range cell.This output is used to estimate the power of the echo and is compared with echo peaks to make a decision about the presence of a target in a range cell.
Thereby, a decision could be made about the presence of the target in a range cell.The general overview of digital processors introduced in the paper is depicted in Figure 3.The second stage of the processor delineated in Figure 3 represents N filters, which have inputs that are sampled by a fast A/D converter.In order to classify different target echoes, sampling operations should be applied in burst form with intervals, as shown in Figure 4. Burst sampling is a technique used in radar signal processing to efficiently capture and process multiple-range cells within a short period of time [29,30].In traditional radar systems, continuous sampling is performed, where the received signal is continuously sampled at a fixed rate.However, this approach may not be efficient when dealing with pulsed radar systems and the processing of multiple-range cells.Burst sampling overcomes this limitation by sampling the received signal in bursts or groups.Instead of continuously sampling the entire duration of the radar pulse repetition interval (PRI), burst sampling selectively samples specific intervals within the PRI.These intervals are typically determined based on the desired range resolution and the processing capabilities of the system.During each burst, the received signal is sampled at a high rate for a short duration, capturing the echoes from multiple range cells.These sampled echoes are then stored in memory cells corresponding to the respective range cells.By capturing multiple range cells within a burst, the system can process a larger volume of data in a shorter time frame.Burst sampling offers several advantages.Firstly, it reduces the amount of data that needs to be processed compared to continuous sampling, as only specific intervals within the PRI are sampled.This helps in optimizing computational resources and reducing processing time.Secondly, burst sampling allows for improved range resolution, as the system can capture echoes from closely spaced range cells within each burst.However, burst sampling also introduces some challenges.It requires synchronization between the transmit pulses and the burst sampling intervals to ensure proper alignment of the sampled data with the corresponding range cells.Additionally, careful consideration is needed in determining the burst sampling intervals to avoid issues such as range ambiguity and overlapping echoes.Each burst of the input signal is sampled into N-range cells, and they are stored in memory cells 1 to N.  The content of each memory cell is assigned as a filter input.The digital processor board for pulsed Doppler radar is designed and implemented using the TMS320C50 processor, known for its digital signal processing capabilities.The block diagram scheme of the digital processor board is depicted in Figure 5.In the implemented system, after current amplification, the base-band analog echo signal is transmitted to the signal conversion block using an efficient hardware component, such as a Watch Dog.This hardware component ensures the reliable and accurate conversion of the analog signal into digital form.To further improve the performance and minimize interference, specific schemes have been proposed in our system.For instance, the power supplies of the analog part and the digital part are separated, and the earth connection is isolated to minimize digital noise affecting the analog components.By providing these additional details regarding the radar signal processing algorithms, we aim to offer a more comprehensive understanding of the implementation aspects in Section 3.These insights into the digital processor unit, the use of digital Doppler filters, and the overall system architecture will enable readers to gain a deeper appreciation of the technical aspects of our study.

Software Design
As mentioned before, the task of the software is to implement the signal processor RGDF, which is a radar detector, by using the hardware designed in the paper.In general, this software should be able to accomplish the three main tasks of a Pulse-Doppler radar detector.Block diagrams of the signal processor software for this radar are illustrated in Figure 5, which contemplates hardware design.In this method, the number of range cells is constant for any state of radar performance (i.e., N range cells).Since the falling edge of the signal strobe occurs, the output of memory address counter DP-RAM becomes zero (i.e., counter is reset).Flip-flop output is zero just before the falling edge of pulse A0, which occurs with radar transmission simultaneously.Suppose the state when flip-flop output is zero; hence, according to the program chart in Figure 6, A/D is composing the content of DP-RAM bank 1 and DP-RAM bank 0 is loading processor internal memory (i.e., input buffer) with its content.When the falling edge of pulse A0 occurs, one of the N filter outputs, which its address is available at the input port of DSP processor should be transmitted to the DSP processor output port connected to a D/A converter.At the end of each burst processing, the signal should be transmitted to the monitoring unit, and the output of N filters could be stored in the internal memory of the processor thereafter (i.e., the output buffer).After an output is transmitted according to the routine chart due to bank 0 filtering, the output buffer should be called to eliminate clutter, perform rectifications and integrations, and store processing results in the internal memory.It should be noted that in order to transmit filter output to the monitoring unit on time, the routine should apply processing attempts to the first N/2 bank 0 data, and an output should be transmitted again to the monitoring unit using a D/A converter thereafter, where the output transmission period is the same as the pulse A period.When operations above are accomplished, it is time to carry out bank 0 data filtering operations by using N/2 remain filters due to suppression of clutter, rectifications, integrations, and also the storage of processing results in the internal memory (i.e., output buffer).Then the processor should be waiting for the alteration of bank 0 content, which could be caused by a flip-flop during loop wait 1, which continues until the flip-flop output is set.Hence, during the loop wait, A/D is composing bank 0, and the content of bank 1 could be transmitted to the internal processor memory (i.e., input buffer).Therefore, a radar cycle could be executed, and the cycle of output transmission and filtering operations will also be repeated.

Proposed Method Based on Parametric and Non-Parametric Techniques
The proposed method combines a hybrid approach that incorporates both parametric and non-parametric techniques mentioned earlier.It is crucial to acknowledge that the received signal consists of a combination of clutter and target echoes.To mitigate the clutter effect, the first step involves obtaining the clutter spectrum.Additionally, the signal spectrum is obtained using a non-parametric technique based on FFT.By subtracting the clutter spectrum from the signal spectrum, the algorithm effectively eliminates the influence of clutter.The structure of the algorithm is illustrated in Figure 6, with each block operation explained subsequently.The method leverages both parametric and non-parametric techniques based on FFT to eliminate the power spectrum of clutter from the received signal.
The algorithm's outputs are simulated for the most severe wind condition (i.e., gale force) and a target with a radar cross-section (RCS) of 0.28 m2 and a Doppler frequency of 300 Hz.The results of the simulations are shown in Figure 7. -The block labeled "Hamming windows" is utilized to reduce the level of side lobes.-In the block responsible for noise level estimation, the outputs of the W and IIR low pass filters are averaged, and this average value is regarded as the noise level.-AR-parameter estimator block: Signal parameters (i.e.θ = [a1, a2, …, an] T and σ 2 ), are obtained here using Yule-Walker method.-AR-spectral evaluation block: This section of the algorithm allows for obtaining a model-based clutter spectrum with N-points accuracy and the corresponding parameters (i.e.θ and σ 2 ).It enables the estimation of the clutter spectrum based on a model.-ABS block: The absolute value of the output data from the AR-spectral estimation block can be calculated at this stage using the given equation {[Real(φw)] 2 + [Imag(φw)]} 1/2 .-IIR filter block: At this stage of the process, the given relationship allows for the computation of the absolute value of the output data obtained from the AR-spectral estimation block.-Adaptive threshold block: The purpose of this block is to eliminate the clutter effect.The output of the filter is denoted as W in Figure 8.It is evident that targets with frequencies below 50 Hz are frequently disregarded, necessitating an approximation of the clutter spectrum for frequencies above 50 Hz.This approximation can be achieved using the following relation: The equation ( 4) represents the clutter spectrum, denoted as C(.), which needs to be subtracted from W(.).This equation holds true when C is greater than N or when C is equal to 1.1N.The output of this block, denoted as T(n) = W(n) -C(n), is depicted in Figure 7 for severe wind conditions (i.e., gale force), along with a target having a radar cross section of 0.28 m² and a Doppler frequency of 300 Hz.
-Maximum block: In this block, the maximum value of T is determined and subsequently stored.
-Comparator block: In this block, a comparison is made between the maximum value of T and the threshold level.If the data exceeds the threshold level, the output is set to 1; otherwise, it is set to zero.

Simulation Result
This section presents the simulation outcomes of the algorithms proposed in earlier sections.A baseband signal is assumed as the input in a simulated environment, and the results are graphically represented as probability of detection (PD) curves for various conditions in Figures 9 to 23.To evaluate the performance of the detectors, Table 1 identifies 16 different states.These states correspond to various wind conditions considered in the simulations and are determined by the target's distance from the radar and the Doppler frequencies associated with the target's radial velocity.

First State
First type of clutter is referred to as light air which slope parameter is 0.4.Target simulated here is 1000 meters far from radar and its RCS is altered between 1×10 -2 m 2 -5×10 -2 m 2 .Wind is supposed light air and PD curves are plotted with respect to the SCR for Fd = 60Hz and PFA = 10 -4 .The results are shown in Figure 9.The graph in Figure 9 clearly demonstrates that the filter slope CFAR algorithm achieves a high PD for lower SCR values.The slope CFAR algorithm exhibits a tradeoff between PD and SCR, outperforming both the AR-CFAR and filter-CFAR algorithms.It is evident that the performance of the Filter-CFAR and AR-CFAR algorithms is comparatively inferior.By comparing these algorithms (filter slope CFAR, slope CFAR, and adaptive CFAR) for each wind condition, we can determine which algorithm yields the best performance.

Fifth State
The fifth entry in table 1 corresponds to the second type of clutter, with a slope parameter of 0.45.In this simulation, the target is placed at a distance of 1000 meters from the radar, and its Radar Cross Section (RCS) is 5×10 -2 m 2 -4.5×10 -2 m 2 .The wind conditions are assumed to be breezy.Probability of Detection (PD) curves are plotted against Signal-to-Clutter Ratio (SCR) for a Doppler frequency of 60 Hz and a Probability of False Alarm (PFA) of 10 -4 .The simulation results depicted in Figure 10 reveal that adaptive CFAR and slope CFAR exhibit subpar performance, whereas filter slope CFAR yields superior results.

Tenth State
In this simulation, the clutter effect resulting from windy conditions is considered, with a slope parameter assumed to be 0.55.The target is simulated to be located 20,000 meters away from the radar, and its Radar Cross Section (RCS) is varied between 1×10 -3 m 2 -9×10 -3 m 2 .The target is assumed to be located at a far distance, and Probability of Detection (PD) curves are plotted against the Signal-to-Clutter Ratio (SCR) for a Doppler frequency of 300 Hz and a threshold of PFA = 10 -4 .The simulation results are presented in Figure 11, which demonstrates the impact of clutter caused by windy conditions.It is evident that slope CFAR and adaptive CFAR show relatively limited performance, while Filter Slope CFAR exhibits improved PD.

Fourteenth State
In this simulation, the clutter effect resulting from gale force conditions is considered, with a slope parameter assumed to be 0.65.The target is simulated to be located 20,000 meters away from the radar, and its radar cross section (RCS) is varied between 1×10 -3 m 2 -9×10 -3 m 2 .The target is assumed to be located at a far distance, and Probability of Detection (PD) curves are obtained through simulation by varying the Signal-to-Clutter Ratio (SCR) for a Doppler frequency of 60 Hz and a threshold of PFA = 10 -4 .The simulation results are presented in Figure 12, which illustrates the impact of clutter caused by the worst wind condition with a slope parameter of 0.65.It is evident that while all three algorithms show similar performance for SCR values less than -42 dB, the filter slope CFAR outperforms CFAR and adaptive CFAR for SCR values greater than -42 dB.In general, the comparison between Figures 9 to 23 confirms that the filter slope CFAR algorithm is the most effective.

Conclusions
This article discusses the implementation of the digital pulse doppler radar signal processor board using the DSP chip of the TM320C50 family.This DSP processor board has been manipulated here to provide multilateral advantages, for instance, being programmable in the field, energy efficiency, and cost reduction.Potential challenges and limitations in implementing DSP for pulse Doppler radar include the requirement for extensive computational resources due to the high sampling rates and complex algorithms involved.Moreover, the real-time processing demanded by radar applications necessitates efficient hardware and software designs.Additionally, the presence of clutter and interference introduces complexities that may impede accurate target detection and tracking.Moreover, the high sensitivity of Doppler measurements to noise and the potential for target ambiguity further pose challenges in achieving reliable and precise radar performance.Digital signal processor design for pulsed Doppler radar is an intensive endeavor in designing and constructing advanced radars and improving radar system qualifications.The proposed algorithm could extremely reduce prices and provide small-sized boards.As a result, the hardware designed in the article is competent for implementing different processing algorithms in the context of Pulse-Doppler radar signal processing.Furthermore, the paper investigates both non-parametric and parametric spectral estimation techniques for clutter suppression in ground surveillance pulse Doppler radar.The study places specific emphasis on examining these techniques under varying wind conditions and target locations.The simulations were conducted using a computer, and comprehensive results are presented.The non-parametric techniques studied include slope CFAR, filter CFAR, and filter slope CFAR.The algorithms are explained using block diagrams to illustrate their principles.Additionally, the paper proposes and simulates a combination of both parametric and non-parametric techniques.This hybrid approach aims to leverage the strengths of both methods in order to enhance the clutter suppression capabilities of the radar system.By paraphrasing the original text, the information is presented in a new form while retaining the core ideas and concepts.This helps to avoid plagiarism while still conveying the main points of the original text.

Figure 1 .
Figure 1.Block diagrams of radar processor by using range gates and Doppler filters.

Figure 2 .
Figure 2. General block diagram of Doppler filter.

Figure 3 .
Figure 3. General scheme of digital processor for pulsed Doppler radar.

Figure 5 .
Figure 5. Block diagram scheme of digital signal processing system.

Figure 7 .
Figure 7.The results of different components of the proposed CFAR algorithm for gale force clutter and a target with RCS (Radar Cross Section) of 0.28 m² and a Doppler frequency (Fd) of 300 Hz are displayed.

Table 1 .
Various simulated states were considered during the analysis.